1. Field of the Invention
The present invention relates to a low noise receiving apparatus provided in a high-frequency front-end circuit, and particularly to a low noise receiving apparatus which switches an amplification operation and a bypass operation depending on an input RF (Radio Frequency) signal strength. The amplification operation is to amplify the input RF signal by an amplifier, and the bypass operation is to bypass the amplifier.
2. Description of Related Art
In recent years, mobile terminals such as Wireless-LAN (Local Area Network), D-TV (Digital Television), and GPS (Global Positioning System) are increasing rapidly. In a low noise receiving apparatus mounted to such mobile terminal, generally an amplifier to amplify an RF signal is provided in a front-end circuit in order to obtain a good receive sensitivity. The mobile terminals can be used at any place without limitation, and low noise receiving apparatuses need to receive radio signals of various radio field strength according to the operation environment, such as indoor or outdoor, and the distance from a base station. In a case of receiving a strong radio field strength, such as when a mobile terminal is used in the vicinity of a base station, a signal strength input to the amplifier of the low noise receiving apparatus becomes strong, thereby saturating an amplified signal and reducing the distortion characteristics.
There is a method suggested in order to improve the abovementioned issue, which is to bypass the amplifier and transmit an input RF signal to a subsequent stage as-is when the intensity of a received RF signal is strong (Japanese Unexamined Patent Application Publication No. 10-84300 and Japanese Unexamined Patent Application Publication No. 2008-28908). A switching device for bypass must be provided in a low noise receiving apparatus having such function to bypass an amplifier. As the miniaturization of mobile terminals advances, the low noise receiving apparatuses are required to be further miniaturized and simplified.
FIG. 7 is a block diagram illustrating an apparatus disclosed in Japanese Unexamined Patent Application Publication No. 10-84300. In FIG. 7, 61 is an LNA (Low Noise Amplifier), 62 and 63 are attenuators, 66 is an input matching circuit, 64 and 67 are output matching circuits, 68 is an RF (Radio Frequency) input terminal, 69 is an RF output terminal, and 65 is a 1 input 1 output switching circuit. The input matching circuit 66 matches an impedance of the input side of the LNA 61. The output matching circuit 67 matches an impedance of the output side of the LNA 61. If the radio field strength received from the RF input terminal 68 is smaller enough than input saturation power of the LNA 61, an RF signal is passed to an amplification path. At this time, the input/output terminals of the switch 65 are opened and the attenuator 62 is configured to be the minimum attenuation. As described above, if the radio field strength is small, a received RF signal passes through the input matching circuit 66 and the attenuator 62, amplified by the LNA 61, and output from the output terminal 69 via the output matching circuit 67.
If the power of the RF signal becomes large enough so that output power exceeds a predetermined threshold value Pmax even after setting the attenuator 62 to the maximum attenuation, the received RF signal is passed to the bypass path. That is, the attenuator 62 is set to the maximum attenuation to short-circuit between the input and the output terminals of the switch 65. The attenuation of the attenuator 63 is adjusted so that a mixer in the subsequent stage is not saturated. As described above, if the signal strength of an RF signal is large, the received RF signal is output from the output terminal 69 via the attenuator 63, the output matching circuits 64 and 67. Even when the radio field strength of the received RF signal is large, a bypass path can keep an RF output within a specified range and prevent from saturating non-linear devices such as an amplifier and a mixer.
FIG. 8 is a block diagram illustrating the apparatus disclosed in Japanese Unexamined Patent Application Publication No. 2008-28908. In this apparatus, as with Japanese Unexamined Patent Application Publication No. 10-84300, an RF signal input from the input terminal 81 via the input matching circuit 82 is output to the output matching circuit 87 via either the bypass circuit 83 or the amplifier circuit 84 depending on the amplitude. The transistors 85 and 86 included in the amplifier 84 compose an amplifier. A first control circuit 90 supplies a gate voltage of the transistors 88 and 89, which function as switches of the bypass circuit 83 and the amplifier circuit 84. The first control circuit 90 controls the received RF signal to be input to either the bypass circuit 83 or the amplifier circuit 84 by controlling the gate voltage of the transistors 88 and 89 according to the signal strength of the received RF signal. An output of the bypass circuit 83 or the amplifier circuit 84 is input to the common output matching circuit 87.
The apparatus disclosed in Japanese Unexamined Patent Application Publication No. 2008-28908 enables to reduce the number of the output matching circuits by sharing the output matching circuit 87 between the bypass circuit 83 and the amplifier circuit 84, as compared to the circuit configuration disclosed in Japanese Unexamined Patent Application Publication No. 10-84300, which is illustrated in FIG. 8.
However, two output matching circuits (64 and 67) are provided as matching circuits of output side in the apparatus disclosed in Japanese Unexamined Patent Application Publication No. 10-84300 in order to match the impedance of the bypass path and the amplifier path. Generally a capacitor or an inductor device is used as the matching circuit. Therefore, the apparatus disclosed in Japanese Unexamined Patent Application Publication No. 10-84300 requires more devices and generates problems such as increasing the circuit size and cost. Further, the capacitor or the inductor used for the matching circuit generally has large circuit size. This generates problems of increasing the chip area and also the chip cost.
Moreover, in the apparatus disclosed in Japanese Unexamined Patent Application Publication No. 2008-28908, an input of the output matching circuit is common to the bypass path and the amplifier path. The impedance of the output matching circuit 87 is specified to have good characteristics of the path which passes through the amplifier circuit 84. Therefore, the inventor has found a problem that when passing through the bypass circuit 83, an inconsistency is generated in the impedance of the output matching circuit 87, and the loss of the bypass signal becomes larger.